Electronics Engineer for Development of Radiation Tolerant Mixed Signal Design Kits

Company Description

At CERN, the European Organization for Nuclear Research, physicists and engineers are probing the fundamental structure of the universe. Using the world's largest and most complex scientific instruments, they study the basic constituents of matter - fundamental particles that are made to collide together at close to the speed of light. The process gives physicists clues about how particles interact, and provides insights into the fundamental laws of nature. Find out more on http://home.cern.

Job Description

Welcome to the Spanish Trainee Programme FTEC (Formacion en Tecnologias Estrategicas del CERN)!

CERN and our professionals very much enjoy sharing their knowledge and expertise with recent graduates from university or higher technical institutes seeking further training in a wide area of projects and who are committed and passionate about their chosen field.

The EP-ESE-ME Section is responsible for the designs of integrated circuits to be used in the CERN experiments. You will have unique training opportunities in the area of microelectronics design tools and microelectronics design.

Functions

• Development of a mixed signal design kits for 65-nm & 130-nm CMOS processes.
• Development of a mixed signal design kit for a more advanced 28-nm CMOS process.
• Development and verification of design workflows.
• Support of these design kits to the designers from our collaborating institutes.

Training Value

You will acquire knowledge in the following areas:

• Microelectronics design tools
• Microelectronics design

Qualifications

In order to qualify for a place on the programme you will need to meet the following requirements:

• You are a Spanish national.
• You hold or are about to complete an "ingeniero superior" or "master" degree in one of the following fields: mechanical, electrical, electronic or computing engineering, applied physics or similar. You are expected to have obtained your qualification by the time you take up your appointment at CERN.
• You can start your traineeship in February 2019, however, in exceptional cases a slightly later start date might be possible which would be subject to approval by all concerned parties.
• You have no more than 4 years’ experience following completion of your last degree.
• You have not previously worked at CERN for more than 14 months.
• Exceptions to the application of these criteria above can be envisaged if you hold a PhD degree or are in the process of obtaining it.
• You have a good working knowledge of English or French. 

Job specific Requirements

• Master in Electronics Engineering with specialization in microelectronics design
• Design and development of microelectronics circuits
• Ability to use EDA tools for mixed mode microelectronics design

Additional Information

CERN would very much like to benefit from your expertise, commitment and passion. In return, you will be provided with:

• An contract of association of one year, renewable for a second year;
• A monthly take-home pay of 4,128 Swiss francs;
• 2.5 days of paid leave each month
• Health insurance cover from a Spanish Insurance company.

The selection process will be finalized at the beginning of December by a dedicated panel of experts from CERN and CIEMAT. You can therefore expect to hear the result of your application in December.

This is how you can apply

You will need the following documents to complete your application:

• A CV;
• Your most recent relevant qualification/diploma if completed;
• Academic transcript of your highest qualification giving an overview of your grades and studied modules.
• Optional but recommended: One or more reference letter(s): You can upload these letters at the time of application if you have them to hand. You will also be provided with a link as soon as you have submitted your application to forward to your referees to upload their letters confidentially. Please note this must be done before the closing date.

Please make sure you have all the documents requested to hand as you start your application. Once submitted you will not be able to upload any documents or edit your application. If you have already applied to another FTEC position with this email, your documents will remain on your candidate profile and you don't have to submit them another time.

Please note that you must also complete the following questionnaire: http://ftec-programme-2018.web.cern.ch and provide the relevant documents listed in the questionnaire to justify your answers by the closing date (31st October). This is required by CIEMAT in order to validate and evaluate your application. Note that if you apply to several positions of the FTEC programme, you only have to fill in the survey once.