ASIC Digital Design and Verification Engineer (EP-ESE-ME-2019-108-LD)
Company DescriptionAt CERN, the European Organization for Nuclear Research, physicists and engineers are probing the fundamental structure of the universe. Using the world's largest and most complex scientific instruments, they study the basic constituents of matter - fundamental particles that are made to collide together at close to the speed of light. The process gives physicists clues about how particles interact, and provides insights into the fundamental laws of nature. Find out more on http://home.cern.
Are you a digital electronics designer with experience in functional verification? We are seeking to strengthen our capabilities in digital-on-top functional verification of our ASICs and aim to share this expertise and best practices with collaborating groups in the broader high energy physics community. Working on the 65nm node or below, we aim for designs with high performance and robust behaviour in the harsh environment of the LHC experiments. Thorough functional verification is a key component in helping to minimise the number of iterations required for complex designs. Take part!
You will join the Electronic Systems for Experiments Group (ESE) of the Experimental Physics Department (EP), which designs electronic systems, including ASICs, for the experiments at CERN and also supplies a series of electronics related services. The Microelectronics section (ME) develops analogue and digital integrated circuits for the readout and control of the CERN experiments. We are seeking to strengthen our capabilities in digital-on-top functional verification of our ASICs and aim to share this expertise and best practices with collaborating groups in the broader high energy physics community.
As ASIC Digital Design and Verification Engineer, you will:
- Model and design high speed SerDes solutions for the LHC experiments as part of a team.
- Define and develop complex test benches using the UVM methodology to help enable first-time-right silicon.
- Perform design synthesis and post layout verification on complex high speed ASICs.
- Share knowledge as an expert in verification of complex high speed ASICs with others both within the CERN group and in the broader high energy physics community.
Master's degree or PhD or equivalent relevant experience in the field of electronics engineering or a related field.
- Demonstrated experience in the verification of complex digital electronics.
- Deep knowledge and extensive experience of the UVM environment and tools such as Verilog or VHDL programming.
- Experience with at least one modern CMOS process and its application to low power, high speed ASIC design.
Experience in the following fields will also be valued:
- Experience with design synthesis, post layout verification and chip finishing.
- Experience with the use of CAE tools for mixed mode microelectronics design: analog simulation, compact layout, extraction and re-simulation.
- Knowledge and application of high-level description languages and tools.
- Design and simulation of digital electronic circuits.
- Design and simulation of digital microelectronic circuits.
- Working in teams: understanding when teamwork is required to achieve the best results; including others accordingly and sharing information.
- Achieving results: having a structured and organised approach towards work; being able to set priorities and plan tasks with results in mind.
- Demonstrating flexibility: adapting quickly and resourcefully to shifting priorities and requirements.
- Communicating effectively: checking to ensure that the message has been well understood; ensuring that information, procedures and decisions are appropriately documented.
- Learning and sharing knowledge: keeping up-to-date with developments in own field of expertise and readily absorbing new information; sharing knowledge and expertise freely and willingly with others; coaching others to ensure knowledge transfer.
- English: spoken and written with the ability to draw up technical texts.
- The ability to understand and speak French in professional contexts would be an advantage.
Eligibility and closing date:
Diversity has been an integral part of CERN's mission since its foundation and is an established value of the Organization. Employing a diverse workforce is central to our success. We welcome applications from all Member States and Associate Member States.
This vacancy will be filled as soon as possible, and applications should normally reach us no later than 17.11.2019.
Contract type: Limited duration contract (5 years). Subject to certain conditions, holders of limited-duration contracts may apply for an indefinite position.
Job grade: 6-7
Job reference: EP-ESE-ME-2019-108-LD
Benchmark Job Title: Electronics Engineer
Please make sure you have all the documents needed to hand as you start your application, as once it is submitted, you will not be able to upload any documents or edit your application further