Young Graduate Trainee for Space Microelectronics
EUROPEAN SPACE AGENCY
Young Graduate Traineeship Opportunity in the Directorate of Technology, Engineering and Quality.
ESA is an equal opportunity employer, committed to achieving diversity within the workforce and creating an inclusive working environment. Applications from women are encouraged.
Young Graduate Trainee for Space Microelectronics
This post is classified F1.
ESTEC, Noordwijk, The Netherlands
The Microelectronics Section of the Data Systems, Microelectronics & Components Division has core responsibilities covering technical support to ESA missions and research activities in the areas of
(i) digital and analogue integrated circuits (ASIC and FPGA) and intellectual property (IP) core development for space applications,
(ii) mitigation techniques to counter radiation effects for ASIC and FPGA
(iii) tools and methods for IC design and development (from specifications to tested devices).
Candidates interested are encouraged to visit the ESA website: http://www.esa.int/Enabling_Support/Space_Engineering_Technology/Microelectronics/ESA_Microelectronics_Section
Within the field of space ASIC and FPGA microelectronics, you will work on a subset of objectives based on the different activities proposed below and tailored to your technical background and professional development preferences:
- Developing and testing functional representative cases of software-defined hardware with the new European space FPGAs (“BRAVE”) implementing on-board data processing functions in collaboration with ESA colleagues. Tasks will include benchmarking existing digital IP cores relevant to the work, helping to identify areas for improvement in the programming tools in close collaboration with NanoXplore. The target FPGAs will be the BRAVE NG-LARGE and the NG-ULTRA FPGAs when available, the first worldwide radiation-hardened SoC-FPGA for space.
- Investigating and evaluating the effectiveness of design mitigation techniques to counter radiation for use in space applications of non rad-hard and commercial off-the-shelf (COTS) FPGAs. This activity is of major importance for the use of those FPGA in NewSpace. The target FPGA technologies include Xilinx Ultrascale and beyond, as well as Microsemi FPGAs.
- Contributing to implementation of a Reduced Instruction Set Computer-V (RISC-V) microprocessor test chip in advanced sub-micron ASIC technology. This requires working with Integrated Circuit Computer-Aided Design (IC CAD) tools such as Mentor, Synopsys, Cadence.
- Performing microelectronics design and/or testing (electrical and radiation performance) of analogue and mixed-signal new IP cores  and devices for space applications. ESA has several recently-developed and under-development devices and IP in Design Against[AF1] Radiation Effects (DARE) 180nm [Single Event Transient (SET) test vehicle, Analogue to Digital Converter (ADC), Digital to Analogue Converter (DAC)]; it would like to extend this group of devices and IPs while focusing on 65nm-and-smaller technology nodes.
- Simulating the radiation effects on transistors and basic logic cells with 3D Technology Computer-Aided Design (TCAD) modelling tools for evaluation of technologies we want to fly in space. ESA has already initiated research with robust chip tools for 180nm and 65nm technology of UMC, ST and TSMC. We would like to investigate other processes such as 28/22/12nm Fully Depleted Silicon-on-Insulator (FDSOI) and 14/12nm Fin Field Effect Transistor (FinFET).
- Developing a demonstrator on a SystemC Virtual Platform , using such a platform to solve an on-board data processing problem exploring different possible System-on-Chip (SoC) architectural solutions.
- Investigating the high-level synthesis design flow for space applications, including how to apply soft SEE mitigation techniques in such a flow, targeting several FPGA devices such as BRAVE, Microsemi RTG4 and Xilinx Kintex Ultrascale.
You should have just completed, or be in the final year of a university course at Master's level (or equivalent) in microelectronics, with a focus on digital and/or analogue integrated circuit design and technology.
The working languages of the Agency are English and French. A good knowledge of one of these is required. Knowledge of another Member State language would be an asset.
You should demonstrate good interpersonal skills and the capacity to work both independently and as part of a team.
During the interview your motivation and overall professional perspective/career goals will also be explored.
For behavioural competencies expected from ESA staff in general, please refer to the ESA Competency Framework.
The closing date for applications is 15 December 2019.
If you require support with your application due to a disability, please email email@example.com.
Please note that applications are only considered from nationals of one of the following States: Austria, Belgium, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Luxembourg, the Netherlands, Norway, Poland, Portugal, Romania, Spain, Sweden, Switzerland, and the United Kingdom. Nationals from Slovenia, as an Associate Member, or Canada as a Cooperating State, can apply as well as those from Bulgaria, Cyprus, Latvia, Lithuania and Slovakia as European Cooperating States (ECS).
Priority will first be given to candidates from under-represented Member States.
In accordance with the European Space Agency’s security procedures and as part of the selection process, successful candidates will be required to undergo basic screening before appointment