Our team and mission

Under the direct authority of the Data Systems, Microelectronics and Components Division, the Microelectronics Section’s core responsibilities cover technical support for ESA missions and research activities in the areas of:  

1. digital and analogue integrated circuit (application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), microprocessor) and intellectual property (IP) core developments for space applications; 
2. tools and methods for the development of integrated circuits (from specifications to tested devices); 
3. radiation mitigation techniques for ASIC and FPGA. 

You are encouraged to visit the ESA website: http://www.esa.int

http://www.esa.int/Enabling_Support/Space_Engineering_Technology/Microelectronics/ESA_Microelectronics_Section 

Field(s) of activity/research for the traineeship

As a Young Graduate Trainee within the field of space ASIC and FPGA microelectronics, you will work on a subset of objectives based on the various activities outlined below and tailored to your technical background and professional development preferences:

• Explore the frameworks available to efficiently implement CNNs on FPGAs, performing an analysis of the existing design methodologies, and propose tools or adaptations to existing tools that can be used to generate an efficient CNN for space-qualified FPGAs, including a solution for synthesising the CNN into a hardware description language. The selected method can finally be illustrated in a laboratory demonstrator. 
• Explore the state of the art in artificial intelligence (AI) application execution in RISC-V and propose an efficient strategy to implement it. The best solution will be identified by exploring different architectural alternatives with the aid of an RISC-V model that can be simulated in a virtual platform. Finally, the proposed solution can be prototyped on a commercial board containing an RISC-V processor and a companion FPGA. 
• Explore the state-of-the-art implementation of sophisticated signal processing algorithms for space science, Earth observation and telecommunications applications with high-level synthesis for bandwidth, power efficiency and robustness. You will work with the next-generation space signal processing platform, including the latest analogue-to-digital converters (ADCs), digital-to-analogue converters (DACs) and FPGAs available for space. Implementation of the chosen application using high-level synthesis tools for the FPGAs will be profiled and bottlenecks to higher performance identified.
• Develop and test functionally representative cases of software-defined hardware using the new European space FPGAs, implementing on-board data processing functions in collaboration with ESA colleagues. The work will include benchmarking of existing digital IP cores relevant to the work, while also helping to identify areas of improvement in the programming tools in close collaboration with NanoXplore. The target FPGA will be the BRAVE NG-ULTRA, the first worldwide radiation-hardened SoC-FPGA for space. 
• Investigate and evaluate the effectiveness of design techniques to mitigate against radiation for non-radiation-hardened, commercial off-the-shelf (COTS) FPGAs for use in space applications. This activity is of major importance in terms of the use of such FPGA in New Space missions. The target FPGA technologies include Xilinx UltraScale and Microsemi FPGAs.
• Design and/or testing (electrical and radiation performance) of analogue and mixed-signal blocks and devices for space applications. ESA has devices and IP developed in 65nm, 28nm, 22nm and/or 16nm technologies covering single-event transient (SET) test vehicles, (ADCs) analogue-to-digital converters, (DACs) digital-to-analogue converters, and PLL (phase-locked loops).
• Simulate the radiation effects on transistors and basic logic cells with Technology Computer-Aided Design (TCAD) modelling tools for the evaluation of technologies earmarked for spaceflight using tools such as Accuro from Robust Chip, TFIT from IROC or Sentaurus from Synopsys. The aim is to investigate the resistance to radiation of integrated circuits built with processes such as CMOS 180/65 nm bulk, 28/22 nm Fully Depleted Silicon-on-Insulator (FDSOI) and 16/7nm Fin Field-Effect Transistor (FinFET). 

Technical competencies

Behavioural competencies

Result Orientation

Operational Efficiency

Fostering Cooperation

Relationship Management

Continuous Improvement

Forward Thinking

Education

You should have just completed, or be in the final year of your Master’ s degree in Physics, microelectronics, electronics or equivalent.

Additional requirements

You should have good interpersonal and communication skills and should be able to work in a multicultural environment, both independently and as part of a team.

The working languages of the Agency are English and French. A good knowledge of one of these is required. Knowledge of another Member State language would be an asset.

During the interview, your motivation and overall professional career goals will also be explored.